Question

I am trying to implement a Command Line Interface for an existing project. The way I am doing this is using two separate makefiles. One is the makefile already existing for the project, the other is for the CLI. I run the CLI makefile first, getting the necessary files and then link these files with the existing project using the makefile of project. Now, the problem is every time I add functions from existing project to the CLI file, the CLI makefile goes ahead and builds these functions, which I dont want it to do, since thats not necessary and gives me warnings and errors (since I dont want to keep including all headers and .o’s).

To cut the long story short, can I do something so that the makefile of CLI ignores the function added to CLI file and not look inside the function to check for everything?

Answer 1

Let one of the makefiles add a definition for a macro (calling it useCLI) in the compilation process (-DuseCLI). For the functions you don’t want to compile, surround them with #ifndef useCLI and #endif. Beware of dependencies, though.