Question

I have a problem in giving initial value zero to a signal type of matrix2D in VHDL. I defined it as follows:

type matrix2D is array (integer range <> , integer range <> ) of signed(2 downto 0);

and in my VHDL code for initial value I wrote:

process(matrix1, matrix2, s_out_adder)
  variable v_flipflop_adder: matrix2D(0 to 4, 0 to 4) :=((0 to 4),(others =>(others=>'0')));
begin   
....

But unfortunately it doesn’t work.

Does anyone know how I can define initial value zero for the matrix2D?

Answer 1

Page 86 of my copy of Ashenden states

We can also use aggregates to write multi-dimensional array values. In this case, we treat the array as though it were an array of arrays, writing an array aggregate for each of the leftmost index values first.

This is what you need for your example:

variable v_flipflop_adder_simple_init: matrix2D(0 to 4, 0 to 4) :=
       (others => (others => (others => '0')));

Here’s a more complex one:

variable v_flipflop_adder: matrix2D(0 to 4, 0 to 5) :=
       (      4 => (1 => "001", others => "101"),
         others => (5 => "110", others => "010"));