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Editorial Team
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Editorial Team
Asked: May 14, 20262026-05-14T16:50:44+00:00 2026-05-14T16:50:44+00:00

A segmented interrupt architecture RTOS can boast zero interrupt latency using clever partitioning of

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A segmented interrupt architecture RTOS can boast “zero interrupt latency” using clever partitioning of work between the interrupt handler and the scheduler. There are at least a couple proprietary closed source instances of this approach, e.g., AVIX and Quasarsoft- Q-Kernel.

A related SO question asked about open source RTOS links, but all of the suggested operating systems used unified interrupt architectures.

Is there any open source segmented interrupt architecture RTOS?

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  1. Editorial Team
    Editorial Team
    2026-05-14T16:50:44+00:00Added an answer on May 14, 2026 at 4:50 pm

    I believe this is also sometimes referred to as “deferred interrupt” servicing or handling, so it may be worth using that term to find candidates.

    It is perhaps possible to ‘fake’ it by reserving the highest priority task levels for ISR servicing, so say you have 32 interrupt vectors, you would reserve priority levels 0 to 31 (assuming zero is high) for the ISR2 levels. Each real interrupt then simply sets an event flag signalling the ISR2 task. It remains your responsibility in this case not to call blocking functions in the ISR2 tasks, nut non-blocking kernel services can be used freely.

    I am not sure whether this gives you exactly the same effect (I’d have to study it more fully than I have – or care to right now), but it does mean that you can do minimal work in the true ISR, and a true ISR will always preempt any ISR2.

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