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Editorial Team
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Asked: 2026-05-12T20:54:21+00:00

Basically, I have a file ‘blah.txt’. That files gets parsed by a ‘compiler’ and

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Basically, I have a file ‘blah.txt’. That files gets parsed by a ‘compiler’ and from it will generate N output .c files. I want a makefile that will from that .txt file generate the c files then compile all of them and archive them in a libmystuff.a

I tought of something like this :

all: dogen libmystuff.a

dogen: source.txt
    mycompiler $^

libmystuff.a: $(addsuffix .o, $(shell ls *.c))
    $(AR) rcs $@ $^

.PHONY: dogen

But obviously that doesn’t work because the dependencies are evaluated at the start and at that point the *.c just doesn’t yield anything yet since they don’t exist.

Does anyone see how to accomplish that (without listing all the generated *.c explicitely) ?

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1 Answer

  1. Editorial Team

    Pavel Shved is right(*), you must rerun Make. Here is a trick I’m rather proud of. It will handle dependencies on objects that may not yet exist, and won’t run unnecessarily.

    SOURCES = $(wildcard *.c)
OBJECTS = $(SOURCES:.c=.o)

all: libmystuff.a

ifeq ($(MAKELEVEL),0) 
libmystuff.a: source.txt
    mycompiler $^ 
    @$(MAKE) -s $@
else
libmystuff.a: $(OBJECTS)
    $(AR) rcs $@ $^ 
endif

    (*) My old nemesis, we meet again.

    EDIT:
    If some other make calls this make… I hadn’t thought of that. But I think this will solve it:

    SOURCES = $(wildcard *.c)
OBJECTS = $(SOURCES:.c=.o)

all: libmystuff.a

libmystuff.a: source.txt
    mycompiler $^ 
    @$(MAKE) -s phonyLib

.PHONY: phonyLib
phonyLib: $(OBJECTS)
    $(AR) rcs libmystuff.a $^

    (Yes, I know, if you feel an urge to build a file called “phonyLib” you won’t be able to do it with this makefile, but let’s not be perverse.)

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