Question

Below is a piece of code I have written in C and in-line assembly to load some short values from the array blk to ARM R registers.

...
short *blk; 
... //blk memory allocation and initialization
short tmp0, tmp1, tmp2;
asm volatile (
"ldrh %[tmp0], [%0]\n\t"
"ldrh %[tmp1], [%1]\n\t"
"ldrh %[tmp2], [%2]\n\t"
: [tmp0] "=r" (tmp0), [tmp1] "=r" (tmp1), [tmp2] "=r" (tmp2)
: "m" (blk[0])  , "m" (blk[8]), "m" (blk[8*2])
: 
);

I am getting this error message from arm gcc 4.6

/tmp/ccDEBLCN.s:266: Error: ARM register expected -- `ldrh r3,[[r5,#0]]'

GCC complains about ldrh %[tmp2], [%2] line, but I don’t see why. I took a look at LDRH instruction and it seems to me that my instruction template is right.

Load memory halfword [15:0] from register address + 5-bit immediate offset
LDRH <Rd>, [<Rn>, #<immed_5> * 2]

BTW this is the command I am using to compile this:

arm-none-linux-gnueabi-gcc -O2 -march=armv7-a -mthumb 

Answer 1

asm (
"ldrh %[tmp0], %[ref0]\n\t"
"ldrh %[tmp1], %[ref1]\n\t"
"ldrh %[tmp2], %[ref2]\n\t"
: [tmp0] "=&r" (tmp0), [tmp1] "=&r" (tmp1), [tmp2] "=r" (tmp2)
: [ref0] "m" (blk[0])  , [ref1] "m" (blk[8]), [ref2] "m" (blk[8*2])
: 
);