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Can CPU Cache still be utilized for memory use by the programmer while it is operating in the UC mode? Or is this impossible because the programmer is unable to address Cache memory? I mistakenly thought MTRR’s could be used to address CPU Cache memory?
You appear to be asking if you can turn off the normal behavior of cache and instead use its SRAM as a directly addressable memory area. The short answer is no. Also, Uncacheable (UC) is a property of a memory page or memory region, not a mode of the cache itself.