Question

Can wildcards be used in the static pattern rule context in GNU make? For example:

$(BUILD_DIR)/$(DEPENDENCIES) : */%.d : $(SOURCE_DIR)/%.c
      ...

Answer 1

Leave the $(SOURCE_DIR)/%.c off the static pattern rule, and enter the dependencies on a separate line. Maybe:

# Tell make "build/f.d: source/f.c" for each source file
$(foreach _,${srcs},$(eval ${BUILD_DIR}/$(notdir $_): $_))

${BUILD_DIR}/${DEPENDENCIES}: ${BUILD_DIR}/%.d:
    ...

This answers the question, though I share @Beta’s opinion that this is not what you want.