Question

Consider the following C program:

int main(void)
{
    char string[10] __attribute__ ((aligned(32)));
    int i;
    int *intp = (int*)(string + 1 );

    printf("string: 0x%x, intp: 0x%x\n", string, intp);

    for (i=0; i<10; i++)
    {
        string[i] = 10;
    }
    dump(string);

    printf("*intp: 0x%x\n", *intp);

    *intp = 0xEEEEEEEE;
    dump(string);

    return 0;
}

So I was basically forcing CPU to access a 32 bit data (int) at a misaligned address. TBH I was hoping for a segfault on my ARM9 board. But instead I got some interesting/confusing result:

After setting intp to 0xEEEEEEEE, dumping of string shows:

 0xee, 0xee, 0xee, 0xee, 0xa, 0xa, 0xa, 0xa, 0xa, 0xa    

So the code actually changed the first element in string! Why?

Thanks,

Answer 1

Most probably the CPU “rounds” misaligned addresses, so that when you pass a misaligned address to a certain instruction, the hardware finds the closest boundary and performs the designated operation on that address.

This might really answer your question:

On the ARM and StrongArm, if you ask for a non-aligned word and you
don’t take the alignment trap, then you get the aligned word rotated
such that the byte align you asked for is in the LSB. Eg,

Consider:
        Address: 0  1  2  3  4  5  6  7
        Value  : 10 21 66 23 ab 5e 9c 1d

Using *(unsigned long*)2 would give:
        on x86: 0x5eab2366
        on ARM: 0x21102366