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Home/ Questions/Q 7709315
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Editorial Team
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Editorial Team
Asked: June 1, 20262026-06-01T00:49:52+00:00 2026-06-01T00:49:52+00:00

%.d: %.c @set -e; rm -f $@; \ $(CC) -MM $< > $@.$$$$; \

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%.d: %.c
        @set -e; rm -f $@; \
        $(CC) -MM  $< > $@.$$$$; \
        sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \
        rm -f $@.$$$$

sinclude $(SOURCES:.c=.d)

above is I saw at someone’s blog, but it does not explain how the code work to create the dependency between .c and .h files in makefile.

is there someone who would explain it for me or supply some materials ?

I would really appreciate for your help!thank you!

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1 Answer

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  1. Editorial Team
    Editorial Team
    2026-06-01T00:49:54+00:00Added an answer on June 1, 2026 at 12:49 am

    Suppose your only new source file is foo.c, which contains the lines

    #include "foo.h"
    #include "bar.h"
    

    Make determines that foo.d is out of date (because it doesn’t exist or foo.c is newer), so it executes the rule.

    %.d: %.c
            @set -e; rm -f $@; \
            $(CC) -MM  $< > $@.$$$$; \
            sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \
            rm -f $@.$$$$
    
    sinclude $(SOURCES:.c=.d)
    

    Make evaluates the $$$$ as $$ and passes that to the shell; the shell interprets this as the value of the $ parameter, which is the process ID of the shell, which the rule wants to use to construct a unique file name. This will remain constant only within one command, which is why the rule is written with the line continuations (“\”). This isn’t really a good way to do it; if there are different processes trying to build foo.d at the same time, you’re probably hosed anyway. So we can rewrite the rule:

    %.d: %.c
            @set -e; rm -f $@
            $(CC) -MM  $< > $@.temp
            sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.temp > $@
            rm -f $@.temp
    
    sinclude $(SOURCES:.c=.d)
    

    We can dispense with the first rule, it doesn’t really bear on the question.

    The second command, $(CC) -MM $< > $@.temp, expands to gcc -MM foo.c > foo.d.temp (or some other compiler). The -MM flag tells the compiler to produce a list of dependencies:

    foo.o: foo.c foo.h bar.h
    

    The next line chews up this list with sed

    sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g'
    

    Which translates roughly as “change foo.o: to foo.o foo.d :“:

    foo.o foo.d : foo.c foo.h bar.h
    

    (And the last command removes the temporary file.)

    This is not the best way to handle dependencies, since it will rebuild all %.d files every time you run Make, even ones irrelevant to you target. A more polished approach is Advanced Auto-Dependency Generation.

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