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Home/ Questions/Q 7059411
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Editorial Team
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Editorial Team
Asked: May 28, 20262026-05-28T04:13:44+00:00 2026-05-28T04:13:44+00:00

Does anyone know related information about L2 cache in Fermi? I have heard that

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Does anyone know related information about L2 cache in Fermi? I have heard that it is as slow as global memory, and the use of L2 is just to enlarge the memory bandwidth. But I can’t find any official source to confirm this. Did anyone measure the hit latency of L2? What about size, line size, and other paramters?

In effect, how do L2 read misses affect the performance? In my sense, L2 only has a meaning in very memory-bound applications.
Please feel free to give your opinions.

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  1. Editorial Team
    Editorial Team
    2026-05-28T04:13:45+00:00Added an answer on May 28, 2026 at 4:13 am

    This thread in the nvidia has some measurements for performance characteristica. While it is not official information, and probably not 100% exact, it gives at least some indication for the behaviour, so I thought it might be useful here (measurements in clockcycles):

    1020 non-cached (L1 enabled but not used)

    1020 non-cached (L1 disabled)

    365 L2 cached (L1 disabled)

    88 L1 cached (L1 enabled and used)

    Another post in the same thread gives those results:

    1060 non-cached

    248 L2

    18 L1

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