Does anyone know what aspect ratio mean in memories? and how it’s different in block ram and distributed ram in Xilinx FPGA?
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Does anyone know what aspect ratio mean in memories? and how it’s different in
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Does anyone know what aspect ratio mean in memories? and how it’s different in block ram and distributed ram in Xilinx FPGA?
Thanks
“Aspect ratio” refers to the number of address bits and data bits when accessing memory.
For example, say you have memory that holds 65,536 bits. If you use 8 data bits per address, you have 8,192 addresses (65,536 / 8 = 8,192), which means 13 address bits (2^13 = 8,192). So one aspect ratio for accessing 65,536 bits is 8 data bits and 13 address bits.
But say you want 16 data bits per address. Then you can only have 4,096 addresses since 4,096 * 16 is 65,536, and that’s all the memory you have. In that case, you can only have 12 address bits. So another aspect ratio for accessing 65,536 bits of memory is 16 data bits and 12 address bits.