Question

For example, I have 10 source files named ex1.c, ex2.c, ex3.c….ex10.c and maybe more in the future.

Is it possible that I can use commandline argument as a variable in GNU Make so that when I want to compile ex1.c, I can type in make 1. If I want to compile ex10.c, I can type in make 10. And I don’t need to add more lines to makefile when I add more sources like ex100.c later.

Answer 1

This doesn’t strike me as a good idea, but yes, you can do it.

To build object files (e.g. ex3.o):

%: ex%.c
    $(CC) -c $< -o ex$*.o

To build executables (e.g.ex3):

%: ex%.c
    $(CC) $< -o ex$*