Question

gcc 4.4.4

I have the following Makefile

OBJECT_FILES = brd.o logger.o test_brd.o
CFLAGS = -m32 -ggdb -Wall -Wextra -D_REENTRANT -D_THREAD_SAFE -O0 -D_DEBUG

# Linker Run-time library path
LDFLAGS = -Wl,-rpath=/usr/NET/lib 

FLATFORM = -DLINUX
TARGET = dlg
CC = gcc -m32

LIBS_PATH = -L/usr/NET/lib
INC_PATH = -I/usr/NET/include

LIBS = -lnc -lnxx -lphread

$(TARGET): $(OBJECT_FILES)
    $(CC) $(CFLAGS) $(LDFLAGS) $(OBJECT_FILES) $(FLATFORM) $(INC_PATH) $(LIBS_PATH) $(LIBS) -o $(TARGET)

test_brd.o: test_brd.c brd.c
    $(CC) -c $(CFLAGS) test_brd.c

brd.o: brd.c logger.c
    $(CC) -c $(CFLAGS) $(INC_PATH) brd.c

logger.o: logger.c
    $(CC) -c $(CFLAGS) $(INC_PATH) logger.c

clean: 
    rm -f $(TARGET) $(OBJECT_FILES)

However, the logger.c doesn’t need to be built anymore. Is there a way to include it in the project without having to compile it each time. When I clean my project. It will re-compile it again, and it is a large file.

Many thanks for any suggestions,

Answer 1

You could change:

OBJECT_FILES = brd.o logger.o test_brd.o

into:

OBJECT_FILES_EXCEPT_LOGGER = brd.o test_brd.o
OBJECT_FILES = $(OBJECT_FILES_EXCEPT_LOGGER) logger.o

and change your clean to:

clean: 
    rm -f $(TARGET) $(OBJECT_FILES_EXCEPT_LOGGER)

But the whole point to clean is to do a full rebuild. If you don’t want a full rebuild, just use make on its own and it’ll build only what it needs to. With a properly built makefile, you should almost never need to do a full rebuild (the only exception I can think of to that is when you change the makefile itself but I even bypass that by making all rules depend on the makefile as well).

By the way,

brd.o: brd.c logger.c

and

test_brd.o: test_brd.c brd.c

don’t seem write to me – there’s no dependency between brd.o and logger.c, nor between test_brd.o and brd.c (at least based on your compilation statements). The only way you would have a dependency is if you #include‘d one C file within another, and that’s rarely a good idea.