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Home/ Questions/Q 7771793
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Editorial Team
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Editorial Team
Asked: June 1, 20262026-06-01T16:44:12+00:00 2026-06-01T16:44:12+00:00

Given the following code : typedef int array[4][4]; void transpose2(array dst, array src) {

  • 0

Given the following code :

typedef  int  array[4][4];

void transpose2(array dst, array src)
{
   int i, j;
   for ( i=0; i<4; i++) {
     for ( j=0; j<4; j++) {
         dst[i][j] = src[j][i];
     }
   }
}

Assumptions :

  • int is 4 bytes

  • src array starts at address 0 , dst starts at address 64

  • the size of the cache is 32 bytes , at the beginning the cache is empty

  • there is a L1 cache working under direct mapping using write-through, write-allocate

  • the size of the block is 16 bytes

I’m trying to figure out the cache miss & cache hit of dst and src .

The question – to fill in the tables of src and dst arrays , where
they’re empty at the beginning : Before the run

First I’ll present the solution of my professor : After the run

Here is my solution , but somewhere, I’m making a mistake :

Assuming that I run i from 1 to 4 and not from 0 to 3

First iteration :

src  dst

1,1-> 1,1

2,1-> 1,2

3,1-> 1,3

4,1-> 1,4

Second iteration:

src    dst 
1,2 ->2,1

2,2 ->2,2

3,2 ->2,3

4,2 ->2,4

Third iteration:

src    dst 
1,3 -> 3,1

2,3 -> 3,2

3,3 -> 3,3

4,3 -> 3,4

Fourth iteration:

src    dst 
1,4 -> 4,1

2,4 -> 4,2

3,4 -> 4,3

4,4 -> 4,4

I don’t understand why are there HITS at all at the tables of dst ,
I know that I’m wrong , can someone please explain why are there indeed HITS in the solution above ?

Regards
Ron

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1 Answer

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  1. Editorial Team
    Editorial Team
    2026-06-01T16:44:14+00:00Added an answer on June 1, 2026 at 4:44 pm

    Because cache is usually organised into lines, each of size n bytes. When you access a particular memory address, that address along with the surrounding n-1 bytes are read into the cache.

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