here comes a short story
These days I tried to trace the compile process of the Makefile. According to the EDK override mechanism, a component while be compiled by using the source code of the same name under the override path and the remaining under the component’s directory.
Assume that there have two header file of same name, the directory path as following:
component directory – D:\outside\inner\hello.h
override directory – D:\outside\inner\overrides\hello.h
So, D:\outside\inner\overrides is used during compiling.
But, here comes a question!
It’s known that we could add the macro in the Makefile to indicate the include paths.
For instance:
INC = -I D:\outside\inner
then I added another include path like:
INC = $(INC) -I D:\outside\inner\overrides
If I set the command in the Makefile like:
hello : hello.c hello.h
<Tab>gcc -c hello hello.c $(INC)
Will the compiler still take the hello.h file under the override path?
Or will it just takes the first found file through the INC path(component path)?
Thanks for answering.
gccwill use the first header it finds in the include paths. You can double check this my intentionally making a syntax error in one of the header files and looking for an error message. Or put this in overrides header:and look for a warning message.