Here is an easy makefile.
I have 2 questions.
- all: $(SOURCES) $(EXECUTABLE)
Why put the SOURCE in the dependency. -
“.cpp.o:”
Why not write “.o: .cpp”CC=g++ CFLAGS=-c -Wall LDFLAGS= SOURCES=main.cpp hello.cpp factorial.cpp OBJECTS=$(SOURCES:.cpp=.o) EXECUTABLE=hello all: $(SOURCES) $(EXECUTABLE) $(EXECUTABLE): $(OBJECTS) $(CC) $(LDFLAGS) $(OBJECTS) -o $@ .cpp.o: $(CC) $(CFLAGS) $< -o $@
The dependency of
allon$(SOURCES)is not necessary or even useful. The dependency information should be such that the executable depends on the object files, and the object files depend on the source files.The notation:
was the way the original (7th Edition UNIX™) version of
makehandled compilation rules. GNU Make (and Sun Make) used the%notation to allow:Basically, it was a design decision that made sense at the time and maybe less sense in retrospect. It was not the most egregious problem (that would be tabs at the start of command lines).