Question

How can I determine if the following memory access is coalesced or not:

// Thread-ID
int idx = blockIdx.x * blockDim.x + threadIdx.x;

// Offset:
int offset = gridDim.x * blockDim.x;

while ( idx < NUMELEMENTS )
{
    // Do Something
    // ....

    // Write to Array which contains results of calculations
    results[ idx ] = df2;

    // Next Element
    idx += offset;
}

NUMELEMENTS is the complete number of single dataelements to process. The array results is passed as pointer to the kernel function and allocated before in global memory.

My Question: Is the write access in the line results[ idx ] = df2; coalesced?

I believe it is as each thread processes consecutive indexed items but I’m not completely sure about it & I don’t know how to tell.

Thanks!

Answer 1

Depends if the length of the lines of your matrix is a multiple of half the warp size for devices of compute capability 1.x or a multiple of the warp size for devices of compute capability 2.x. If it is not you can use padding to make it fully coalesced. The function cudaMallocPitch can be used for this purpose.

edit:
Sorry for the confusion. You write ‘offset’ elements at a time which I interpreted as lines of a matrix.

What I mean is, after each iteration of your cycle you increase the idx by offset. If offset is a multiple of half the warp size for devices of compute capability 1.x or a multiple of the warp size for devices of compute capability 2.x then you it is coalesced, if not then you need padding to make it so.

Probably it is already coalesced because you should choose the number of threads per block and thus the blockDim as a multiple of the warp size.