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Editorial Team
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Editorial Team
Asked: May 26, 20262026-05-26T15:59:08+00:00 2026-05-26T15:59:08+00:00

I am a bit stuck up with the following question, Consider the following MIPS

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I am a bit stuck up with the following question,

Consider the following MIPS code and answer the questions that follow.

addi $t1, $s0, 400
loop: lw $s1, 0($s0)
add $s2, $s2, $s1
lw $s1, 4($s0)
add $s2, $s2, $s1
addi $s0, $s0, 8
bne $t1, $s0, loop

What value is the label loop translated to in the conditional branch
instruction?

Now I know the mathematical formula for Branch Target Address. But here as memory addressing is not done so I found out the offset by counting the lines between the target address and PC. This gives the answer to be 7 (word offset). Am I right with this approach?

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  1. Editorial Team
    Editorial Team
    2026-05-26T15:59:08+00:00Added an answer on May 26, 2026 at 3:59 pm

    A quick experiment with MARS simulator http://courses.missouristate.edu/KenVollmar/MARS/download.htm gave me the answer-6, -5 for number of lines difference and another -1 because PC is increased by 1 after the instruction.

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