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Home/ Questions/Q 158197
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Asked: May 11, 20262026-05-11T10:38:20+00:00 2026-05-11T10:38:20+00:00

I am assigned with the task of verifying some verilog based RTL code. Now,

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I am assigned with the task of verifying some verilog based RTL code. Now, coding the RTL testbench using verilog seems to be very difficult (for me). So I would like to try one of the following. – Try providing a PLI interface to the RTL and thereby invoke ‘C functions for testing – Using system ‘C for interfacing the ‘C functions

PS: I already have a extensive ‘C code that was used for testing the behavioral model. I am new to the world of hardware programming. Any pointers would be greatly appreciated.

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  1. 2026-05-11T10:38:21+00:00Added an answer on May 11, 2026 at 10:38 am

    If you already have extensive C code that was used to test the behavioral model, then the thing to do is to just add a PLI (or DPI) interface that will allow you to call that c code from verilog.

    SystemC is basically C++ with a lot of classes that allow you to model HW. I don’t see how you would benefit from learning SystemC for the task you are attempting as you already have a C model available that you can test the HW against. Learning SystemC is probably overkill for what you are trying to do.

    FYI. If you want to learn something that is heavily used in the industry today then I would suggest that you learn SystemVerilog. These days SystemVerilog, basically verilog with a bunch of high level software language features built in; along with ‘VMM’, a ‘verification methodology’ (i.e. a bunch of libraries), seems to be all the rage in hardware verification land.

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