I am having problems with memory addressing in MIPS. It says that the addressing is word aligned… in the text below I don’t understand why it’s looking at the 2 least significant bits of the address? why? can someone give me an example to clarify/illustrate the point made here… so is it saying that a valid halfword address are all whose 2 least significant bits are either 00 or 10?
so what if I want to load a byte from a memory which is word aligned?? how can I do this? it is said that I need to shift left by 2, i.e make the least 2 significant bits 0… then extract the bits…
‘Word aligned’ means that the CPU will always read 4 bytes.
However, if the operation is actually on a 2-byte short, it is legitimate to have an address ending 0b00 or 0b10 (so the address is even) and the CPU will poke the correct 2 bytes into the register when loading into a register or write the correct information.
Similarly, when reading a character, the two least significant bits can take any value, and the correct byte is loaded into the relevant register or the relevant part (usually the LSB) of the register is written to the correct part of the memory.
However, if you attempt to read a (4-byte)
intwith an address that does not end 0b00, then you will get a SEGV or thereabouts.