I am planning to design a hardware simulation language like VHDL for my final year project. How should I go about it ?
Any help would be greatly appreciated.
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I am planning to design a hardware simulation language like VHDL for my final year project. How should I go about it ?
Any help would be greatly appreciated.
If you want to design a hardware simulation language, start with the hardware.
Determine the level at which you want to simulate the hardware – transistor level, switch level, register level, behavioural level and what nots. Everything else starts from there. Once that is decided, you will know what constructs your language needs to support.
You will need to know what kind of devices your language can work with – transistors, gates, registers, muxes, memory, arithmetic units and what nots. Then, you need to find the appropriate models for each device.
In the end, you will definitely want to limit your scope. Limit yourself to doing one thing. The VHDL language was not invented by a single person in a day.