I am reading ARM assembly book by JR Gibson, chapter 5. In explanation to integer ADD and SUB instructions the table is given for flag updation after calculation of result.
What I am not able to understand is the flag update for unsigned integer addition for 2 integers A, B where A and B are “not both 0” and the result is 2^31-1 < result < 2^32(i.e between 0x7FFFFFFF, 0x100000000)
It states that the above results in flags N=1, Z=0, C=0, V=X (don’t care) being set and instruction mnemonic extensions being interpreted as
EQ = No, NE = Yes, CS = No, CC = Yes, MI = Yes, PL = No, VS, VC = X, HI = No, LS = Yes, LT, GT, LE = X
Why unsigned addition resulting in within 32 bit range value causes setting of N bit (and hence MI and LS are Yes)
What I was expecting is N flag can be set since 31st bit is 1 (counting from bit 0), but the result is anyway positive (i.e PL = Yes, since it is within range 2^31-1 ~ 2^32).
Am I not understanding some thing here?
The N flag is always set to the bit 31 of the result. The processor does not care whether you add or subtract signed or unsigned numbers – the resulting bit pattern is the same in both cases. Similarly, the PL/MI suffixes just check for the N flag; they don’t care whether you consider numbers signed or unsigned.
Signedness is important for multiplication and division, that’s why those instructions have two mnemonics.