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Editorial Team
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Editorial Team
Asked: May 20, 20262026-05-20T07:51:45+00:00 2026-05-20T07:51:45+00:00

I am reading some C text at the address: https://cs.senecac.on.ca/~lczegel/BTP100/pages/content/compu.html In the section: Addressible

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I am reading some C text at the address:

https://cs.senecac.on.ca/~lczegel/BTP100/pages/content/compu.html

In the section: Addressible Memory they say that “The maximum size of addressable primary memory depends upon the size of the address registers.“

I do not understand why is that.

Can anyone give me a clear explanation, please?

Thanks a lot.

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  1. Editorial Team
    Editorial Team
    2026-05-20T07:51:45+00:00Added an answer on May 20, 2026 at 7:51 am

    If you have 32-bit registers, then the highest address you can store in a single register is 2^32-1, so you can address 2^32 units (in modern computers, units are almost always bytes). A larger number simply won’t fit.

    You can get around this by using memory addresses that are larger than a single register can hold (and some CPUs/operating systems have features for doing so), but using addresses/pointers will be slower because it has to fiddle with multiple registers.

    As an example, suppose you have 32-bit registers but 64-bit pointers and want to increment a pointer to find the next item in an array of char (++p). Instead of performing a simple increment instruction, the processor will have to

    1. Increment the lower 32 bits;
    2. check if the result is zero (overflow);
    3. increment the upper half as well if overflow occurred.

    Simplifying a bit, this means it has to perform a branch (if-then-else) instruction, which is one of the slowest and most complex instructions a modern CPU performs.

    (See, e.g., x86 memory segmentation on the Wikipedia for a multi-register addressing scheme used in Intel processors.)

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