I am trying to modify my makefile to support .cpp and .cc, however, I keep getting an error such as
target `source/systemFuncs.cpp' doesn't match the target pattern
I am modifying an existing makefile that support .cc and I want to make it also compile .cpp, but I am unsure how. This was originally a make file for a nacl project.
How can I compile both .cpp and .cc?
Related content to the makefile:
x86_32_OBJS:=$(patsubst %.cc,%_32.o,$(CXX_SOURCES))
$(x86_32_OBJS) : %_32.o : %.cc $(THIS_MAKE)
$(CXX) ${INCDIRS} -o $@ -c $< -m32 -O0 -g $(CXXFLAGS)
$(PROJECT)_x86_32.nexe : $(x86_32_OBJS)
$(CXX) -o $@ $^ -m32 -O0 -g $(CXXFLAGS) $(LDFLAGS)
CXX_SOURCES has both .cc files AND .cpp files in them, so it needs to be able to compile both
You haven’t given us much to go on, but I’ll make a guess. I think you added
source/systemFuncs.cpptoCXX_SOURCES. Then Make hit this line:which replaced “.cc” with “_32.o”, and left
source/systemFuncs.cppuntouched. Make then tried to feed this name into a rule that expected “_32.o”, and crashed.Try this:
With luck, this will prove crude but effective. Further improvements will be possible later.
EDIT:
If both sets of filenames must be in one variable (
CXX_SOURCES) you can separate them like this:Does that suffice?