Question

I am trying to write a relatively simple Makefile, but I am not sure how to best condense the rules using patterns. I tried using %, but I ran into difficulties. Here is the Makefile in its expanded form:

all : ./115/combine_m115.root ./116/combine_m116.root ... ./180/combine_m180.root

./115/combine_m115.root : ./115/comb.root
    bash make_ASCLS.sh -l 115 comb.root

./116/combine_m116.root : ./116/comb.root
    bash make_ASCLS.sh -l 116 comb.root
...
./180/combine_m180.root : ./180/comb.root
    bash make_ASCLS.sh -l 180 comb.root

Answer 1

Unfortunately, we don’t have a clean way to do this in Make. This task combines a couple of things Make doesn’t do well.

Make can’t handle wildcards very well (or regular expressions at all), so constructions like ./%/combine_m%.root : ./%/comb.root won’t work. I think the closest we can get is with a canned recipe:

define apply_script
./$(1)/combine_m$(1).root : ./$(1)/comb.root
    bash make_ASCLS.sh -l $(1) comb.root
endef

$(eval $(call apply_script,115))
$(eval $(call apply_script,116))
...
$(eval $(call apply_script,180))

We can condense things a little more like this:

NUMBERS := 115 116 # ...180

TARGS := $(foreach n, $(NUMBERS), ./$(n)/combine_m$(n).root)

all : $(TARGS)

...

$(foreach n, $(NUMBERS), $(eval $(call apply_script,$(n))))

There’s also a way to generate NUMBERS, but it’s an even uglier hack.