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Editorial Team
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Editorial Team
Asked: May 12, 20262026-05-12T19:10:22+00:00 2026-05-12T19:10:22+00:00

I am using a hardware interface to send data that requires me to set

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I am using a hardware interface to send data that requires me to set up a DMA buffer, which needs to be aligned on 64 bits boundaries.

The DMA engine expects buffers to be aligned on at least 32 bits boundaries (4 bytes). For optimal performance the buffer should be aligned on 64 bits boundaries (8 bytes). The transfer size must be a multiple of 4 bytes.

I create buffers using posix_memalign, as demonstrated in the snippet bellow.

  posix_memalign ((void**)&pPattern, 0x1000, DmaBufferSizeinInt32s * sizeof(int))

pPattern is a pointer to an int, and is the start of my buffer which is DmaBufferSizeinInt32s deep.

Is my buffer aligned on 64bits?

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  1. Editorial Team
    Editorial Team
    2026-05-12T19:10:22+00:00Added an answer on May 12, 2026 at 7:10 pm

    Yes, your buffer IS aligned on 64-bits. It’s ALSO aligned on a 4 KByte boundary (hence the 0x1000). If you don’t want the 4 KB alignement then pass 0x8 instead of 0x1000 …

    Edit: I would also note that usually when writing DMA chains you are writing them through uncached memory or through some kind of non-cache based write queue. If this is the case you want to align your DMA chains to the cache line size as well to prevent a cache write-back overwriting the start or end of your DMA chain.

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