I am writing a simple vga controller and I find myself repeating the same pattern again and again. How I can avoid this.
red_out <= zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y63)&zero(x-106,y-63);
green_out <= zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y-63);
blue_out <= zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y-63);
Maybe a command that will help me avoid the repetition?
zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y63)&zero(x-106,y-63), use a function. The code would then look something likered_out<=f(zero, x, y);etc.p(red_out, green_out, blue_out, zero, x, y).Check http://www.csee.umbc.edu/portal/help/VHDL/design.html for the syntax.