Question

I found this code in linux kernel (arch/x86/boot/pmjump.S)

# Set up TR to make Intel VT happy       
ltr %di                                //Here1

# Clear registers to allow for future extensions to the
# 32-bit boot protocol
xorl    %ecx, %ecx
xorl    %edx, %edx
xorl    %ebx, %ebx
xorl    %ebp, %ebp
xorl    %edi, %edi

# Set up LDTR to make Intel VT happy           
lldt    %cx                              //Here2

How those make Intel VT happy??
and
why those make intel vt happy??

thank you 🙂

Answer 1

As far as I understand it, they want a valid value in LDTR (NULL selector is valid). There are certain restrictions on the host and guest states during a switch between the two. Perhaps they want too avoid surprises there.