Question

I have a C file for which I want to give cmd line arguments.

Say

$ make --argument1 

or something like this.

So that in my main program I should be able to do argv[1] and be able to access the variable.

I have tried looking for ways of doing this. Is there actually a way of doing this?

These were the relevant content I found on the GNULinux manual about make.

variables defined on the command line are passed to the sub-make
through MAKEFLAGS. Words in the value of MAKEFLAGS that contain ‘=’,
make treats as variable definitions just as if they appeared on the
command line.

Is this what I need to read up more or is this in a different context?

Do let me know.

Answer 1

I think you misunderstand the use of command line arguments – they are given when the executable is executed not when it is compiled.

Better example

foo.c

#include <stdio.h>

int main()
{
   int myval=DEFVAL;

   printf("myval=%d\n", myval);
   return 0;
}

Makefile

DEFVAL=17

foo: foo.c
   gcc -DDEFVAL=${DEFVAL} foo.c -o $@