Question

I have a folder called code/ which has several .cpp files, that all need to be compiled into their .o versions and put in the object/ folder. I’m having some problems with defining correct variable names…

First, I defined some paths:

OBJPATH=object#All compiled .o files need to be placed here.
CODEPATH=code#All .cpp and .hpp header files reside here.

Then, I try to extract all of the filenames from the CODEPATH:

SRC=$(wildcard $(CODEPATH)/*.cpp)

And then, SRC has a value along the lines of code/A.cpp code/B.cpp code/C.cpp. I want to get rid of the code prefix, end replace it with $(OBJPATH), which evaluates to object/. I initially tried this:

TMP=$(SRC:.cpp=.o)
OBJ=$(TMP:$(CODEPATH)=$(OBJPATH))

But, as it turns out, that doesn’t work because the $(var:a=b) functionality will only replace strings at the end of variables, not at arbitrary points.

If I could find a way to get rid of the code/ prefix, my problems would be gone, so how do I do it?

Answer 1

You can use a pattern match substitution (that’s probably not what GNU make calls them though):

OBJ=$(TMP:$(CODEPATH)/%=$(OBJPATH)/%)

You should also be able to do it in one step, without the intermediate TMP:

OBJ=$(SRC:$(CODEPATH)/%.cpp=$(OBJPATH)/%.o)