I have a project with 50+ .h files and 50+ .cpp files. I’m using make to build a project, which looks something like this (it’s just a piece of an entire file):
HEADERS := $(shell find $(INCLUDE) -name "*.h")
%.obj: %.cpp $(HEADERS)
$(CPP) $(CPPFLAGS) -fPIC -o $@ -g -c $<
When I’m making changes to one .h file, the whole project has to be re-compiled. It’s annoying and time-consuming. But I don’t want to hard-code file dependencies inside Makefile, since it’s even more time-consuming. I would like to have some make-like tool, which will find dependencies right inside my .cpp/.h files, automatically. Any suggestions? Thanks in advance!
Simplest way:
Better way:
So compiler will generate all dependencies for each file during build automatically.
Or even better: use Autotools, CMake or other build system that does this job for you.