Question

I have a slew of makefile targets that do the same thing:

${SOME_FILE}:
    ${FILES} | ${DIST_DIR}

    @@cat ${FILES} |                     \
        sed 's/@DATE/'"${DATE}"'/' |     \
        sed 's/@VERSION/'"${CR_VER}"'/'  \
        > ${OUT_FILE};

where ${FILES} and ${OUT_FILE} are the only things changing. I’m trying to figure out if it’s possible to simplify these targets to something like:

${SOME_FILE}:
    compile(${FILES},${OUT_FILE})

Thanks for any insight.

Answer 1

GNU make has this:

• http://www.gnu.org/software/make/manual/make.html#Call-Function

To define a multi-line function, you would use this syntax:

• http://www.gnu.org/software/make/manual/make.html#Canned-Recipes