Question

I have often seen Makefiles that start commands with an “@” symbol to suppress normal output.

target: test
    @echo foo

Has this output:

$ make test
foo

But I often encounter Makefiles with @@ in front of commands:

target: test
    @@echo foo

And the output is identical, as far as I can tell, from Makefiles with only one @ before the echo command.

What’s the difference?

(The @@ seems to be common practice, as seen by this Google Code search: http://www.google.com/codesearch#search/&q=@@echo%20makefile&type=cs)

Answer 1

Looking at the code, it seems that it just strips all the leading @ (or +/-), but I’m not 100% sure (that is, you can put there as many @ as you wish) – look at job.c in make source code.

while (*p != '\0')
    {
      if (*p == '@')
    flags |= COMMANDS_SILENT;
      else if (*p == '+')
    flags |= COMMANDS_RECURSE;
      else if (*p == '-')
    child->noerror = 1;
      else if (!isblank ((unsigned char)*p))
    break;
      ++p;
    }