Question

I have recently started using exuberant ctags and emacs for verilog & system verilog coding and code browsing. I currently generate the tags using the command

ctags -e -R --tag-relative=yes --langmap=verilog:.v.vh.sv.svh 

My code contains a lot of `define macros which are all specified in certain header files with extension “.vh” & “.svh”. For e.g. a header file named foo.vh has the following code

`define WIDTH_ADDRESS 32;

and a file top.v invokes the macro as follows

input [`WIDTH_ADDRESS - 1 : 0] InAddress;

While browsing the top.v file using emacs, is there any way by which I can jump directly to to the macro definition in the foo.vh file?

I have been using M-x tags-search <RET> WIDTH_ADDRESS <RET> for sometime now but it jumps to quite a few other instances of `WIDTH_ADDRESS in other files before reaching the foo.vh file.

After some research I did see an option to specify header files using -h option with ctags during tags generation. However I could not get it to work and I guess there was some syntactical error from my part.

First of all are there any notable benefits of specifying a header file using -h option? If so, what is the correct syntax to specify header files? Also can I specify emacs to look into these header files first (files with extension “.vh” &”.svh”) before parsing other files (with extension “.v” & “.sv”)

Answer 1

The syntax for the -h option is -h .vh.svh

I’m not sure why ctags is picking up `WIDTH_ADDRESS macro invocations. If WIDTH_ADDRESS is `defined multiple times it should pick up all the definitions, but not the invocations. Maybe it’s an issue with the Verilog plugin. You can always edit the tags file and delete entries you don’t want. This should be easy to do with a sed or perl script.