Question

I have several .c and custom .h files that I would like to link together using a Makefile, but everything that I’ve tried has ended up with different results than what I’d like.

Basically, I have the following files : rA.c, rA.h, rB.c, rB.h, rC.c, rC.h, rP.c

What I want would to use a makefile to end up with the equivalent of the following command:
gcc -o rv rA.c rB.c rC.c rP.c

And yield an executable “rv” file. All the ways I’ve done it so far (which have been hit&miss, admittedly) have yielded intermediate .o files for each .c file but no final rv executable. Any suggestions would be quite appreciated.

Answer 1

FILES.o = rA.o rB.o rC.o rP.o
PROGRAM = rv

all: ${PROGRAM}

${PROGRAM}: ${FILES.o}
    ${CC} -o $@ ${CFLAGS} ${FILES.o} ${LDFLAGS} ${LDLIBS}

You can add dependencies and other bells and whistles as you like, but that’s a basic outline of a minimal makefile.

If you are definitively using GNU make, there are shorthand notations to abbreviate the command line more:

${PROGRAM}: ${FILES.o}
    ${CC} -o $@ ${CFLAGS} $^ ${LDFLAGS} ${LDLIBS}

The first notation shown will work with any version of make you’re likely to lay hands on.