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Home/ Questions/Q 4106802
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Editorial Team
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Editorial Team
Asked: May 20, 20262026-05-20T21:25:24+00:00 2026-05-20T21:25:24+00:00

I have the following code in MIPS language: lw $s5, -20($s6) sub $t1, $s5,

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I have the following code in MIPS language:

lw $s5, -20($s6)

sub $t1, $s5, $t2

addi $t1, $t2, 50

I need to convert each order to its code:

a. in decimal
b. in hex
c. in binary 32 bits

for the first order (lw $s5, -20($s6)) I did:

a. 35 | 22 | 21 | -20

b. 23 | 16 | 15 | C

3 questions:

1) am I right ?
2) what will be the code for 32 bits binary ?
3) What are the other codes of the other 2 more orders ?

Thanks !

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1 Answer

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  1. Editorial Team
    Editorial Team
    2026-05-20T21:25:25+00:00Added an answer on May 20, 2026 at 9:25 pm

    According to the operands and the type of the instruction, there are several encoding scheme, but all of them are composed by 32 bits and the first six specify the instruction opcode (add, lw etc).

    • Register encoding: these instructions operates only on registers. First six bits are 0, next there are three fields of five bits which specify respectively first and second source register and the destination register. Finally there are other six bits which specify the function (add, sub etc)

    • Immediate encoding: these instruction have an operand which is a memory location. After six bits of opcode there are two fields of five bits for the first and second register, and a field of sixteen bits for the memory location.

    • Jump Encoding: they’re composed by six bits of opcode and twenty-six bits of jump destination

    This article explains these instructions encoding and has a list of all opcodes / function encoding in binary. Once you have determined the binary form simply convert it to decimal and hexadecimal.

    EXAMPLE:
    Suppose we want the encoding of lw $s5, -20($s6). This falls into immediate encoding category, whose encoding is ooooooss sssttttt iiiiiiii iiiiiiii, with o being the opcode, s the first register, t the second register and i the constant. Looking on the table we find the opcode for lw is 100011. Specifying the register’s number is enough, so s is 00101 and t is 00110. The constant (-20) is represented by 2s complement. With 20 being 10100, its 2s complement on 16 bit is 1111111111101100. lw has a loadstore syntax, which template is o $t, i ($s), so the registers are swapped in the encoding. Therefore the instruction encoding for lw $s5, -20($s6) is

    ooooooss sssttttt iiiiiiii iiiiiiii
    10001100 11000101 11111111 11101100
    

    or 8C C5 FF EC (hex) and 140 197 255 236 (dec)

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