Question

I have the following idea:
All the source files are in a SRC directory while all the object files are kept in a OBJ directory. In the GNU makefile I want to automatically search for all source files and create a list of source file objects and a list of o-file objects. I tried the following two syntaxes, which me all get a

No rule to make target `/home/Serial/obj/Serial.o’, needed by …

here are the ideas:

c_files = $(wildcard $(SRC)/*.cpp)
o_files = $(patsub %.c,%.o,$(c_files) )


c_files = $(wildcard $(SRC)/*.cpp)
o_files = $(patsub $(SRC)/%.c,$(OBJ)/%.o,$(c_files) )

The c_files variable seems to be correctly filled, but I cannot get the object list created. The second idea should work, according to documentation, but does not. What is wrong with the replace statement.

To be clear: I expect to have e.g.

c_files = src/file1.cc src/file2.cc src/file109.cc

from which I want to create the following list

o_files = obj/file1.o obj/files.o obj/file109.o

Answer 1

There’s an easier way:

o_files = $(c_files:.cpp=.o)

And to get a pattern that automatically compiles object files:

obj/%.o: src/%.cpp
    $(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $^ -o $@

Combining:

c_files = $(wildcard $(SRC)/*.cpp)
o_files = $(c_files:.cpp=.o)

all: $(PROG)

$(OBJ)/%.o: $(SRC)/%.cpp
    $(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $^ -o $@

$(PROG): $(o_files)
    $(LD) $(LDFLAGS) $^ -o $@