Question

I have the makefile below and a directory tree :

->project/src/main.c, func.c,
Makefile

->project/exe/

->project/inc/

->project/obj/

  cc=gcc
    cflags=-c
    obj=../obj
    exe=../exe
    inc=../inc
    prog.exe: main.o func.o
        $(cc) main.o func.o -o $(exe)/prog.exe
    main.o: main.c $(inc)/defs.h
        $(cc) $(cflags) main.c
        mv main.o $(obj)/
    func.o: func.c $(inc)/defs.h
        $(cc) $(cflags) func.c
        mv func.o $(obj)/

The problem is, the second actions below main.o and func.o (those start with mv) doesn’t work (i.e main.o isn’t moved to the /obj directory). Is there a problem in the syntax of makefile or anything else?

Answer 1

One apparent problem is that the makefile doesn’t build the targets it’s supposed to build. I.e.:

prog.exe: main.o func.o
    $(cc) main.o func.o -o $(exe)/prog.exe

Doesn’t build prog.exe, rather it builds $(exe)/prog.exe, which is a different file. A fix would be:

$(exe)/prog.exe: $(obj)/main.o $(obj)/func.o
    $(cc) $^ -o $@

Prefer using automatic variables for the names of input and output files to avoid duplication and silly typos.