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I implement a reference counting schema and for this i need interlock facilities but no memory fences (as far as i understand).
Unfortunately only Windows has a InterlockedDecrementNoFence compiler intrinsic.
How can i do this with asm inlining? I would need this for gcc/clang too.
A lack of at least an intrinsic memory fence operation (depending on the platform) is pretty much going to be impossible for the semantics of this operation. For an atomic increment/decrement to work, the other processor have to have some guarantee of seeing the value of the atomic operation before they perform their own operations on the variable, and the visibility of the operations on the variable has to have some guaranteed total order. Memory barriers, even implicit ones such as in strong-memory models like x86 where standard memory operations have acquire/release semantics, are paramount to the correctness of an atomic increment/decrement operation.
Keep in mind that even when the documentation for MSVC/gcc says that there is a memory barrier, on x86 there will not be an actual memory barrier applied (i.e., a
MFENCEinstruction) due to the strong-memory model of the platform, but rather a lock on the memory bus to ensure the atomicity of the operation. IA64 on the other-hand will require a memory barrier due to the weaker memory model of that platform. The same would also be true for ARM.