Sign Up to our social questions and Answers Engine to ask questions, answer people’s questions, and connect with other people.
Login to our social questions & Answers Engine to ask questions answer people’s questions & connect with other people.
Lost your password? Please enter your email address. You will receive a link and will create a new password via email.
Please briefly explain why you feel this question should be reported.
Please briefly explain why you feel this answer should be reported.
Please briefly explain why you feel this user should be reported.
I need the instruction movlps with an immediate address that be 64 bits wide, which according to Intel manuals should be perfectly possible. So, something like this:
movlps xmm0, [0x7fffffffffa0]
But all what I get is NASM truncating the operand size to 32 bits and printing the corresponding warning:
sample.s:6: warning: dword data exceeds bounds
I have tried with different forms of the qword prefix without success.
most x64 instructions don’t take 64 bit immed.
unless I’m very mistaken you have to move through the rax register.