I need to write a pre-build makefile which is called separately from the main build file. This make file should make a walk in a directory where it is called. There is a list of directories in another make file called ‘sources.mk’ with a variable which describe the directory:
SUBDIRS := \
. \
directory1 \
directory2 \
Now, I need to run a loop through this list and in this loop I need to call an utility which will process all file with a ‘h’ extension. I wrote this:
include Default/sources.mk
find_files:
for prefix in $(SUBDIRS); do \
for file in *.h; do \
C:/QtSDK/Desktop/Qt/4.7.4/mingw/bin/moc.exe $$prefix/$$file; \
done \
done
Run command: make -f premake.mk
I don’t describe the errors, there are a lot of them, I was trying different makefiles, but I am a newbie at it and these attempts failed. Please, review my code and/or suggest other methods.
Your problem is probably just this one simple thing: You’re looking for
filein*.hin the current directory, not in the subdirectory. Try this instead:With that said, a much better way of doing this is to use
maketo handle the processing of all of the files (and deciding whether or not all of them need to be reprocessed!), rather than using an explicit loop in the rule. You’d start with a list of header files, as Eldar Abusalimov’s answer suggests:The inner piece of that manipulates the SUBDIRS list into a form
directory1/*.h,directory2/*.h, and so on, and then thewildcardfunction expands all the*.hpatterns.Then, you generate the list of output files from them:
This takes that expanded list of header files
directory1/header1.h,directory1/header2.h, and so on, and substitutes the%.hpattern with%_moc.cpp. (Note that, because these names all have the directory name as part of the name, you can’t easily use the more commonmoc_%.hname pattern, because you’d getmoc_directory1/header1.cpp, not the desireddirectory1/moc_header1.cpp. There are ways to get around that, but it’s easier to avoid the problem.) In any case, this gives you a list of output files:directory1/header1_moc.cpp,directory1/header2_moc.cpp, and so on.Now that you have a list of output files, Make knows how to iterate over those pretty easily. You just declare that list as a prerequisite of some other target that you’re making, for instance:
And, finally, you give make a generic rule for making a
*_moc.cppfile from a*.hfile:There, the first line indicates “this is how you make a file that fits the
%_moc.cpppattern, if you have a file fitting the%.hpattern to make it from”. In the second line, the$<becomes the input file (the%.hfile), and the$@becomes the output file. Here, you’re explicitly tellingmoc.exewith the-ooption to spit out a file with the%_moc.cppname rather than whatever it uses by default.So, putting all this together, when you make the
find_filestarget, make will realize that it needs to make all those%_moc.cppfiles in themoc_mocfileslist, and for each one it will see that it has a possible rule that fits, it will see that the rule applies because the corresponding%.hfile exists, and it will apply the rule.This also has the advantage that, if the
%_moc.cppfile already exists and is newer than the%.hfile, indicating that it’s already up-to-date, it won’t bother regenerating it next time you run make. It will only regenerate the files corresponding to the%.hfiles you’ve edited.(Oh, and one last thing: When cutting-and-pasting all these things from this answer, make sure you get your tabs in the right places!)