I often find Bash syntax very helpful, e.g. process substitution like in diff <(sort file1) <(sort file2).
Is it possible to use such Bash commands in a Makefile? I’m thinking of something like this:
file-differences: diff <(sort file1) <(sort file2) > $@
In my GNU Make 3.80 this will give an error since it uses sh instead of bash to execute the commands.
From the GNU Make documentation,
So put
SHELL := /bin/bashat the top of your makefile, and you should be good to go.BTW: You can also do this for one target, at least for GNU Make. Each target can have its own variable assignments, like this:
That’ll print:
See "Target-specific Variable Values" in the documentation for more details. That line can go anywhere in the Makefile, it doesn’t have to be immediately before the target.