I often find myself wanting to compile an example file included in a larger makefile-based open source c project. Is there a uniform best way to proceed?
I can’t just compile the one file using gcc because there are all sorts of headers and dependencies that the c file requires which are scattered about the project. Here is a concrete example:
HOCR (google cache here), is an open source Hebrew language optical character recognition program that is primarily GTK based. I need a command-line only version. Amongst the source code (downloadable here), there is a command-line only example c file: examples/hocr/hocr-cmd.c that does exactly what I want.
How do I compile the example file?
In the base directory I can run ./configure, make and make install but as far as I can tell this doesn’t actually compile the example file.
Also, in addition to the main Makefile I see a number of Makefile.am and Makefile.in files. Are these relevant? Is there a general guiding principle to proceed? This is not the first time I’ve gotten stuck here.
For those who are interested, I am running Ubuntu 10 Lucid on VirtualBox Virtual Machine.
Somewhere in
Makefilethere is a target that builds either the specific file or the files in the directory. Find that target and make it. Additionally, there may be a separateMakefilein that directory or one of its parents that is used for building them..am and .in files are for autotools, which is the step before
./configure. You should not need to modify them in normal use.