Question

I took Computer Architecture course and I understood that processor has 32 registers each of 32 bit. Now I am studying computer architecture course in which I read that 8086 has 8 registers only. But the book I read and this website shows many registers. I am getting confused about the registers in 8086 and 8088. Please help me out.

NOTE:

I have a good understanding of different register sizes in different processors. I am just getting confused in the number of registers.

Answer 1

The 8086 and 8088 are 16 bit processors – their registers are each 16 bits in width. (A few instructions treat the combination of DX and AX as a 32 bit integer, like div input and mul output.)

Note that the 8086 has 16 bit data bus; the 8088 has an 8 bit data bus. (So loading/storing a 16-bit word takes 2 bus cycles. Addresses are still 20-bit for both.)

The site you linked is accurate; the following is a copy/paste from it with a couple light edits:

GENERAL PURPOSE REGISTERS

8086 CPU has 8 general purpose registers, each register has its own
name:

AX – the accumulator register (divided into AH / AL):

Generates shortest machine code: short-form encodings exist
Arithmetic, logic and data transfer
One number must be in AL or AX
Multiplication & Division
Input & Output

BX – the base address register (divided into BH / BL).

Offset address relative to DS by default   CX - the count register (divided into CH / CL):

The LOOP instruction uses it implicitly as a counter
Repetitive operations on strings with the REP command
Count (in CL) of bits to shift and rotate   DX - the data register (divided into DH / DL):

DX:AX concatenated into 32-bit register for some MUL and DIV operations
Specifying ports in some IN and OUT operations   SI - source index register:

Can be used for pointer addressing of data
Used as source in some string processing instructions
Offset address relative to DS by default   DI - destination index register:

Can be used for pointer addressing of data
Used as destination in some string processing instructions as ES:DI
Offset address relative to DS outside of string instructions

BP – base pointer:

Primarily used to access parameters and locals on the stack
Offset address relative to SS

SP – stack pointer:

Always points to top item on the stack
Offset address relative to SS (but can't be used in 16-bit addressing modes)
Should always points to word (byte at even address)
An empty stack will have SP = FFFEh

SEGMENT REGISTERS

• CS – points at the segment containing the current program.
• DS – generally points at segment where variables are defined.
• ES – extra segment register, it’s up to a coder to define its usage.
• SS – points at the segment containing the stack.

Although it is possible to store any data in the segment registers,
this is never a good idea. The segment registers have a very special
purpose – pointing at accessible blocks of memory.

Segment registers work together with general purpose register to
access any memory value. For example if we would like to access memory
at the physical address 12345h (hexadecimal), we could set the DS =
1230h and SI = 0045h. This way we can form 20-bit linear addresses,
instead of just 16 bit with a single register. (This applies in real
mode; in protected mode segmentation is different.)

The CPU makes a calculation of the physical address by multiplying the
segment register by 10h and adding the general purpose register to it
(1230h * 10h + 45h = 12345h):

The address formed with 2 registers is called an effective address.
By default BX, SI and DI registers work with DS segment register; BP
and SP work with SS segment register. Other general purpose
registers cannot form an effective address. Also, although BX can
form an effective address, BH and BL cannot.

SPECIAL PURPOSE REGISTERS

IP – the instruction pointer:

Always points to next instruction to be executed
Offset address relative to CS

IP register always works together with CS segment register and it
points to currently executing instruction.

FLAGS REGISTER

Flags Register – determines the current state of the processor. They
are modified automatically by CPU after mathematical operations, this
allows to determine the type of the result, and to determine
conditions to transfer control to other parts of the program.
Generally you cannot access FLAGS directly, except via pushf/popf. Some special instructions exist to set/clear some of the specific bits.

The status / condition-code bits in FLAGS are:

• Carry Flag (CF) – this flag is set to 1 when there is an unsigned
  overflow. For example when you add bytes 255 + 1 (result is not in
  range 0…255). When there is no overflow this flag is set to 0.
• Parity Flag (PF) – this flag is set to 1 when there is even number of one bits in (the low 8 bits of a) result, and to 0 when there is odd number of one bits.
• Auxiliary Flag (AF) – set to 1 when there is an unsigned overflow (carry-out) for low nibble (4 bits).
• Zero Flag (ZF) – set to 1 when result is zero. For non-zero result this flag is set to 0.
• Sign Flag (SF) – set to 1 when result is
  negative. When result is positive it is set to 0. (This flag takes the value of the most significant bit.)
• Trap Flag (TF) – Used for
  on-chip debugging.
• Interrupt enable Flag (IF) – when this flag is set to 1 CPU reacts to interrupts from external devices.
• Direction Flag (DF) – this
  flag is used by some instructions to process arrays. When this flag
  is set to 0 the processing is done forward, when this flag is set to 1
  the processing is done backward.
• Overflow Flag (OF) – set to 1
  when there is a signed overflow. For example, when you add bytes 100 + 50 (result is not in range -128…127).