Question

I want to depend on a virtual target that only runs once.

Makefile with what I tried so far:

a: b

b: c d
    touch b

c:
    # time consuming task that only needs to run once

d:
    # time consuming task that only needs to run once

Is there a way to stop the dependency chain when b already exists? I’m okay with making a manual clean to get rid of b to trigger a re-run of c and d. I want to be able to run a many times without triggering the long running tasks if b exists.

I have a lot of tasks like c and d, so I want to avoid touching a file per separate task and I don’t want the file system to be cluttered with unnecessary files.

Answer 1

You can write your Makefile as:

a: b

b c:
    # time consuming task that only needs to run once
    touch b

make c will call your task unconditionally.

make b only executes your task when the file b does not exist.

make a depends on b, so the task is only executed when b does not exist,