Question

I want to just type ‘make all’ and have the following Makefile do everything it’s supposed to do:

LEX = lex
YACC = yacc
CC = gcc

calcu: y.tab.o lex.yy.o
    $(CC) -o calcu y.tab.o lex.yy.o -ly -lfl

y.tab.c y.tab.h: parser.y
    $(YACC) -d parser.y

y.tab.o: y.tab.c parser.h
    $(CC) -c y.tab.c

lex.yy.o: y.tab.h lex.yy.c 
    $(CC) -c lex.yy.c

lex.yy.c: calclexer.l parser.h
    $(LEX) calclexer.l

clean:
    rm *.o
    rm *.c
    rm calcu

Answer 1

What all is it supposed to do? If you just want it to build calcu, all you have to do is type make and it will make it along with everything it depends on, because it is the first rule in the file.

If you still want to make an all rule, it can be done like this. I recommend putting this above all other rules, so that you can just type make instead of make all.

all: calcu