Question

I want to know how instead of running

gcc -std=c99 foo.c -o foo -lcs50

I can just run

make foo

The problem is that when I try it with just the make command it says

cc     foo.c   -o foo
Undefined symbols for architecture x86_64:
  "_GetString", referenced from:
      _main in crypto-6PNyQP.o
ld: symbol(s) not found for architecture x86_64
clang: error: linker command failed with exit code 1 (use -v to see invocation)
make: *** [crypto] Error 1

But when I include the other flags in using the gcc command it works just fine. I am taking an online class and they are able to just type in make foo and their output will be

jharvard@appliance (~/Desktop): make foo
gcc -ggdb -std=c99 -Wall -Werror    foo.c  -lcrypt -lcs50 -lm -o foo
jharvard@appliance (~/Desktop):

I have searched google for a while now trying to find the answer to this question but still no luck.

Answer 1

Using GNU make:

make CFLAGS=-std=c99 LDLIBS=-lcs50 foo

Or put those macros into a 2-line makefile:

CFLAGS = -std=c99
LDLIBS = -lcs50

For the more complex options you showed in your last example:

CFLAGS = -ggdb -std=c99 -Wall -Werror
LDLIBS = -lcrypt -lcs50 -lm

With a makefile like this, you can build any program xyz from a single source file xyz.c using just:

make xyz

When you need to create programs from multiple source files, you’ll need a more complex makefile.