I would like a makefile where I can call:
'make' / 'make <subdir>' / 'make clean' / 'make <subdir> clean'
But I do not want it to attempt to resolve clean when called on a subdir!
Here’s an example of my makefile:
SUBDIRS := a b c
all :
@echo building a b and c
clean :
@echo cleaning a b and c
$(SUBDIRS) :
make - C $@ $(MAKECMDGOALS)
All the calls work well except make <subdir> clean which calls make -C <subdir> clean, but then attempts to also resolve target clean separately. How can I get make to stop processing later targets?
To both answers:
thank you for your explanation. it is helpful to know what is and what is not meant to be done. i will not attempt this anymore.
Sigh
Yes, you can do this, but it’ll be an ugly hack and totally contrary to the way Make is designed to work.
The set of targets you pass to Make is a set of targets, not a structured command with syntax. Make is expected to build them all. If the makefile includes a recipe for the target
foo, then Make should build the targetfooa certain way, regardless of whether it is invoked asMake fooorMake foo barorMake bar foo. What you are attempting to do breaks the accepted behavior of Make, so you should try a different approach.If you still wanted to do it, you could do it like this: