Question

I would like to use both 8-bit timers of an ATmega 64 microcontroller.

I used the following code to declare their compare interrupts:

.org 0x0012 ; Timer2  8 bit counter
     rjmp TIM2
.org 0x001E ; Timer0 8 bit counter
    rjmp TIM1

I noticed that if I enter the first interrupt (0x0012) the second timer doesn’t work… its interrupt is never generated.
Why does this happen and how do I solve it?

I also notice something strange. If I reverse their order, I get the error:

Error 3 Overlap in .cseg: addr=0x1e conflicts with 0x1e:0x1f

Answer 1

On the ATmega other interrupts are blocked during the execution of any interrupt vector.

This is a useful feature for various reasons. This prevents an interrupt from interrupting itself, prevents potential stack overflows due to recursion, and allows special registers to be set aside specifically for use in low-latency interrupts without having to save them first, and ensures that the handler is atomic, among other reasons.

It is occasionally useful to explicitly use reentrant interrupts however, especially on the ATmega which lacks interrupt priority levels. To do this, simply add an SEI instruction to set the interrupt enable flag.

You must take great care to avoid the problems mentioned above when doing this though. Generally this means that any registers used must be preserved on the stack and that the interrupt itself needs to be disabled before the re-entrant part starts.

As for your address overlap problem, I suspect the problem is that your assembler counts its program addresses in bytes whereas the interrupt vector addresses in the datasheet are specified in words (for example, the timer 2 compare interrupt would be at 0x24 instead of 0x12). You also need to take care to return to the main code segment after finishing the definition of the vectors or any subsequent code will simply run on into the other vectors.