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I’d like to collect data of L2 cache misses for different cache associativity settings . can anybody tell me how i could change the assocoiativity ?
uSing Ubuntu on x86_64 Intel Core2 duo CPU
To the best of my knowledge this is a hardware design parameter that can’t be reconfigured from software.
Typically, this kind of thing is optimized using hardware simulators. There has been research into software configurable caches, but I haven’t heard of any making it into popular general purpose processors.
-either that or my architecture knowledge is way out of date…